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UPERF(4) Device Drivers Manual (sparc64) UPERF(4)

uperf — performance counters driver

uperf* at ebus?
uperf* at sbus?

Some UltraSPARC host bridges provide performance counters on their host bridges. The counters are a part of the system controller chip (usc, dsc, or qsc). On PCI machines the system controller shows up as a device on the EBus, but on SBus machines the system controller exists in SBus space. The uperf driver provides access to these counters via ioctl(2).

All of the ioctl calls supported by the uperf driver take the following structure as an argument:

struct uperf_io {
	int cnt_flags;
	int cnt_src0;
	int cnt_src1;
	u_int32_t cnt_val0;
	u_int32_t cnt_val1;
};

The cnt_flags field specifies which counters are being operated on and is a bit mask of UPERF_CNT0 and/or UPERF_CNT1.

The cnt_src0 and cnt_src1 fields specify the source for the counter. Not all counters support monitoring all sources and specifying an invalid source for a counter to monitor will result in an error. The sources are specified below:

system clock ticks
all p-requests
p-requests from processor 0
p-requests from the U2S
cycles UPA 128 bit data is busy
cycles UPA 64 bit data is busy
cycles stalled during PIO
memory requests issued
cycles memory controller is busy
stall cycles due to pending transaction scoreboard hit
coherent write miss requests, processor 0
coherent write miss requests, processor 1
coherent intervention transactions
data transactions on U2S
coherent read transactions issued
read requests, processor 0
coherent read misses, processor 0
PIO accesses, processor 0
memory requests completed
read requests, processor 1
coherent read misses, processor 1
PIO accesses, processor 1
coherent write transactions issued
read requests, processor 0
streaming DVMA read transfers, PCI bus A
streaming DVMA write transfers, PCI bus A
consistent DVMA read transfers, PCI bus A
consistent DVMA write transfers, PCI bus A
streaming buffer misses, PCI bus A
DVMA cycles, PCI bus A
words transferred via DVMA, PCI bus A
cycles consumed by PIO, bus A
streaming DVMA read transfers, PCI bus B
streaming DVMA write transfers, PCI bus B
consistent DVMA read transfers, PCI bus B
consistent DVMA write transfers, PCI bus B
streaming buffer misses, PCI bus B
DVMA cycles, PCI bus B
words transferred via DVMA, PCI bus B
cycles consumed by PIO, bus B
TLB misses
interrupts
interrupt NACKS on UPA
PIO read transfers
PIO write transfers
merge buffer transactions
DMA requests retried due to tablewalks, PCI bus A
DMA requests retries due to STC, PCI bus A
DMA requests retries due to tablewalks, PCI bus B
DMA requests retries due to STC, PCI bus B

The cnt_val0 and cnt_val1 contain the values fetched for the counters. Software using this interface should be prepared to handle the counters rolling over.

The uperf device responds to the following ioctl(2) calls, which are defined in <dev/sun/uperfio.h>.

(struct uperf_io) Retrieve the source the counters are monitoring. The cnt_flags is a bit mask for which of the counters is to be fetched. The result is returned in cnt_src0 and/or cnt_src1.
(struct uperf_io) Set the source the counters should monitor. This call also clears the current value of the counters that are set. The cnt_flags is a bit mask for which of the counters is to be set. The cnt_src0 and/or cnt_src1 fields specify the source to be set for the respective counter.
(struct uperf_io) Clear the counters specified in cnt_flags.
(struct uperf_io) Retrieve the value for the counters specified in cnt_flags. The values are returned in cnt_val0 and/or cnt_val1.

ioctl(2), ebus(4), intro(4), sbus(4)

The uperf driver was first supported in OpenBSD 3.1.

The driver was written by Jason Wright <[email protected]>.

February 15, 2015 OpenBSD-current